Source code: arch/riscv/asm.fs. The instructions are listed in
arch/riscv/inst32.fs and (compressed instructions)
arch/riscv/inst16.fs; note that the compressed instructions are
listed there without their c. prefix, but that prefix is
required by the assembler.
Both raw register names (x0...x31,
f0...f31) and symbolic names (e.g., a7,
fa7) are available. Note that some register names form valid
hex numbers, so we recommend using the prefix syntax $fa7
instead of using hex base.
Fences are called |w |r |rw |o |ow |or |orw |i |iw |ir |irw |io
|iow |ior |iorw.
Instruction names do not end with “,”, so there are conflicts with
Forth words like and. You need to use the immediate form of an
instruction (e.g., addi instead of just add) explicitly.
Only the general form of the instruction is supported, not specialized
names (e.g, there is jalr, but not jr; there is, however
c.jr).
There is no automatic selection of compressed instructions. Instead,
you have to call them by their name, with a preceding c., e.g.,
c.addi for the compressed form of addi.
Note that the assembler does not check whether the used registers and immediate values fit in the instruction, and just produces some truncated form if they don’t. This is especially relevant for compressed instructions, where immediate value sizes are even smaller, and some of which only work with some registers.